Optimized Asip Synthesis From Architecture Description Language Models
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Design of Energy-Efficient Application-Specific Instruction Set Processors
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Language-Driven Exploration and Implementation of Partially Re-Configurable Asips
Language-driven Exploration and Implementation of Partially Re-configurable ASIPs »

Digital Communication Receivers, Phase-, Frequency-Locked Loops, and Amplitude Control
V. 1 »

Retargetable Processor System Integration Into Multi-Processor System-On-Chip Platforms
Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms »

Digital Communication Receivers, Synchronization, Channel Estimation, and Signal Processing
Discussing both narrowband and wideband synchronizers, this text covers Jitter accumulation in digital networks and treats LANs as well as public network iss... »